http://www.potatosemi.com/
Be sure to go their "Milestones of 74 Series Logic" Page.
I like their explanation of the brand name:
Posts
MJF-986 ATU – flashover analysis
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F8DRA recently posted some details of an internal flashover problem with a
42,7m (140′) dipole, 6.7m (22′) of 300Ω ladder line and a MJF-986 ATU.
Though he...
2 hours ago
Hello Bill,
ReplyDeleteIf you need 160MHz, then 74AC74/74ACT74 is able to do it if you power it from 5V (max clock frequency is 160MHz):
https://www.fairchildsemi.com/datasheets/74/74ACT74.pdf
If you need any faster then there are specialized chips for that, but those tend to be unobtanium for mere mortals. Basically you are hitting the limits of what the discrete logic can do on a normal PCB.
The simplest way out in such case is to use a small CPLD and program in your own clock divider - e.g. the Xilinx XC9500XL series. The CPLDs run easily to 170MHz or more, depending on type and speed grade, cost only a buck or two and are still in reasonable SMD packages (small pin count PLCCs and TQFPs)
Another option is to go whole hog and use a small FPGA - e.g. the Xilinx Spartan 3E. Then you have the clock generator built-in capable of frequencies in the gigahertz range and you set up the division and any other processing as you need. The FPGA could replace even your Arduino too, but I guess you are not too much into this "software" black box thing :)
Jeri Ellsworth had an SDR radio using the Papillio board (a Spartan 3E FPGA) and a Tayloe detector project like this.
Here is a simple CPLD project to give you an idea (he is using an Altera CPLD instead of Xilinx, but that doesn't matter - those are the two largest manufacturers):
http://hackaday.com/2015/10/28/programmable-logic-build-yourself-a-cpld-module/
This is the Papillio FPGA board (this one is the cheapest and plenty enough for what you need):
http://papilio.cc/index.php?n=Papilio.PapilioOne
This is Jeri's SDR project:
https://www.youtube.com/watch?v=YFVgq3ZB0Mo
73!
Jan