An anonymous reader posted this interesting message in the comments section yesterday. Very interesting. A potentially important tip that may help in the quest for 90 degree phase shift with divide by 2 Flip Flop circuits. What do you guys think? And who is that masked man?
I wanted to make a comment regarding your Frankenstein R2 Clock divider, but did not come around to do it until now and fear if I were to put it below the appropriate post, it would be so many pages away nobody sees it. Please forgive me for posting this here if my assumption is wrong. I had a play with two edge-triggered JK - Flip Flops (74HC109 & HC107) and tied the J and K to the appropriate rails to use them as T- Flip Flops. Because of one being positive, the other one being negative edge triggered, this behaves as a divide by 2 IQ clock generator. The HC107 has an inverting clock input, so as with the other design, some kind of inverter is involved. And as Bill has reported, I initially measured the Phase shift on the scope to be off. But while playing around, I realized this was a function of the signal level. I could tune the phase shift by adjusting the signal level of the driving clock! When the clock and power supply levels were almost equal, the phase shift was very close to 90° and pretty stable with frequency (tested with 1-10Mhz). Later I thought about it some more and suspect it might have to do with the exact time the inverter "flips" on different signal levels in relation to supply voltage level. Aside from the exact cause, I believe one could vary the supply voltage of the gates with the same effect on the phase shift as with varying the signal level. I hope my observation helps to somewhat make the advantages of divide by 2 IQ clock generators more accessible.
Linux Mint, QRP, & C / C++ Compilers
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Greetings:
On the bench I'm studying PLL techniques using a sample & hold detector +
VHF circuitry. Currently, I've got nothing to post RF-wise. Another...
4 hours ago
Another approach would be to add extra gates ahead of the flip flop switching too soon, or add an RC delay to slow down the signal transition. (Steve, KE4AM)
ReplyDeleteMany years ago I needed a quadrature clock (it was for a digital circuit rather than something in the "phasing phamily" of radios) which was quite similar to the circuit that you describe.
ReplyDeleteThe issue that I had was that the original clock wasn't a perfect 50% duty cycle (it was from a divide-by-3 or something - it wasn't a number that was 2^n, certainly).
The fact that the "0" and "1" times were not equal caused a skewing of the quadrature signal. In this particular case I didn't care since all I needed was something quadrature-ish and (theoretically) +/- (almost) 45 degrees would have been OK - much like the very loose requirements from a quadrature rotary encoder that one might use for tuning a radio. (Ever look at the specs for one of those w/respect to phase accuracy?)
Over the years since this experience stuck with me, which is why I've always used the ubiquitous "divide-by-four" scheme and taken advantage of its insensitivity to the duty cycle of the driving signal.
Were I to attempt to use a "divide-by-two" quadrature scheme I would want to be sure that the duty cycle of the feeding signal was very constant - preferably as close to 50% as possible, but this is harder that it might seem since one would likely be sourcing this signal from an analog source and the "squaring" it in a logic gate - and the duty cycle of the output signal would be dependent on the drive level and the logic thresholds of the input gate - and the latter would vary with the temperature, supply voltage and even the brand or batch of the part.
(It would not only be the phase that could impact opposite-sideband rejection, but if the duty cycles of the I and Q LO signals were different - but centered exactly 90 degrees apart - this could impart a slightly different amount of insertion loss in the two signal chains owing to apparent differences in LO energy, etc. and upset the amplitude balance as well. If the mixer were well driven this effect would likely be minor compared to phase differences.)
In other words, I decided that I could probably do it, but I'd also want an accessible "LO phase null" control available (a variable capacitor or varactor to adjust some sort of L/C phasing and/or a pot to nudge voltage thresholds to a logic gate/squarer) that would be used to "tweak" the circuit under varying conditions.
If one were to do this, it might just be easier to use a passive L/C phase shifter and an "on-frequency" LO in the first place. In that case I suppose that one could have a filtered PWM output of the Arduino tune a varactor in such a circuit to keep the phase shift precise across the band, linearly interpolating between stored settings one would empirically determine every 10-50 kHz or so, storing the calibration data in the Arduino's EEPROM.
(Lots of fun, this noodling...)